1. Field of the Invention
The present invention relates to a method for driving a plasma display panel (PDP).
A thin television set utilizing a PDP is becoming commonplace. A PDP is suitable for realizing a high definition television set having a larger screen.
2. Description of the Prior Art
A surface discharge AC type PDP is known well as a color display device. This surface discharge type has a three-electrode structure in which first and second display electrodes to be anodes and cathodes in display discharge for determining light emission quantity in a cell are arranged in parallel on a front or a back substrate, and address electrodes are arranged so that one address electrode crosses a pair of display electrodes. There are two forms of arrangement of the display electrodes. One is a form in which a pair of display electrodes is arranged for one row of a matrix display, and another is a form in which first and second display electrodes are arranged alternately at a constant pitch. In the latter case, three display electrodes correspond to two rows, and a display electrode works for displays of neighboring two rows except both edges of the arrangement. Regardless of the arrangement form, the display electrode pairs are covered with a dielectric layer. In the three-electrode structure, the addressing for controlling electrification quantity in the dielectric layer (wall charge quantity) in accordance with contents of the display employs one of the two display electrodes corresponding to each row as a scan electrode for row selection. The addressing is achieved by generating address discharge between the scan electrode and the address electrode, which triggers address discharge between display electrodes. After the addressing, an AC waveform drive voltage is applied to the display electrode pair, so that display discharge is generated on the surface of the substrate only in cells having a predetermined quantity of wall charge.
In addition, a PDP for color displays that is called an opposed surface discharge type is proposed conventionally. An AC type PDP disclosed in Japanese unexamined patent publication No. 10-333635 includes display electrodes for display discharge, scan electrodes for row selection and address electrodes for column selection. Two display electrodes that make a pair extend in parallel and face each other defining a discharge gas space. The scan electrode is arranged in parallel with the display electrode, so that an electrode matrix for addressing is made up of the scan electrodes and the address electrodes. In this type PDP, total four electrodes are in charge of light emission control of each cell.
FIG. 13 shows a usual drive waveform in the conventional method for display discharge that is applied to the three-electrode structure. In the conventional driving method, a sustain pulse of a simple rectangular waveform having the amplitude Vs is applied to the first display electrode and the second display electrode alternately during the display period. Namely, the first and the second display electrodes are temporarily biased to the potential Vs alternately. However, the address electrodes are not biased. According to this potential control, a drive voltage signal having a pulse train of alternating polarities is applied between the first display electrode and the second display electrode (hereinafter referred to as “at XY-interelectrode”). A voltage corresponding to the bias of the display electrode is applied between the address electrode and the first display electrode (hereinafter referred to as “at AX-interelectrode) as well as between the address electrode and the second display electrode (hereinafter referred to as “at AY-interelectrode”). Responding to the first sustain pulse application to all cells, display discharge is generated in the cell having a predetermined quantity of wall charge formed by the previous addressing. After the discharge is generated, wall charge on the dielectric layer is once disappeared, and wall charge is reproduced promptly. The polarity of the reproduced wall charge is opposite to the previous one. Along with the reproduction of the wall charge, cell voltage at the XY-interelectrode drops so that the display discharge finishes. The cell voltage in the AC type is the sum of the voltage generated by the wall charge (wall voltage) and the drive voltage that is applied between electrodes by the electrode bias. The finish of the discharge means that discharge current flowing through a display electrode becomes substantially zero. When the second sustain pulse is applied, the polarity of the drive voltage and the polarity of the wall voltage at that time are the same, and the cell voltage is increased due to the wall voltage that is added to the drive voltage. Therefore, display discharge is generated again. After that, display discharge is generated by every application of the sustain pulse.
Furthermore, the pulse base potential is not necessarily the ground potential (GND). The polarity of the sustain pulse is not always positive as illustrated but can be negative. In addition, it is possible to add a drive voltage signal at the XY-interelectrode similarly to the illustrated one by applying a pulse having the amplitude Vs′ to one of two display electrodes and a pulse having the amplitude −(Vs−Vs′) to the other display electrode simultaneously.
FIG. 14 is a cell voltage plan view showing the display process according to the conventional driving method. The cell voltage plan view can make a cell state transition understood. In FIG. 14, the horizontal axis is the cell voltage Vc(XY) at the XY-interelectrode, and the vertical axis is the cell voltage Vc(AY) at the AY-interelectrode. The states [1], [1′], [2], [3], [3′] and [4] shown by small circles (∘) in FIG. 14 correspond to the time points t[1], t[1′], t[2], t[3], t[3′] and t[4] in FIG. 13, respectively.
The bias of the first display electrode (the application of the sustain pulse) generates display discharge in which the first display electrode is an anode. After this display discharge finishes, in the period till the trailing edge of the pulse, the application of the drive voltage (Vs) at the XY-interelectrode continues so that the space charge is electrostatically attracted by the dielectric layer to become wall charge in electrification. The electrification lasts until the cell voltage Vc(XY) at the XY-interelectrode becomes zero. When the electrification finishes, the wall voltage Vw(XY) at the XY-interelectrode is −Vs and the wall voltage Vw(AY) at the AY-interelectrode is zero. From this state the following state transition (1)-(4) is performed.
(1) In the state [1], the electrification of the wall charge by the electrostatic attraction of the space charge is finished. The drive voltage is cancelled by the wall voltage Vw(XY), and the cell voltage Vc(XY) at the XY-interelectrode is zero. In addition, the second display electrode and the address electrode are not biased, so the cell voltage Vc(AY) at the AY-interelectrode is also zero. When the bias of the first display electrode is finished, the cell voltage Vc(XY) is changed from zero to the value of the wall voltage Vw(XY). Therefore, the cell voltage Vc(XY) is −Vs in the state [1′].
(2) Next, the drive voltage is added to the wall voltage Vw(XY) by the bias of the second display electrode. In the state [2], Vc(XY) is equal to −2Vs, and Vc(AY) is equal to −Vs. Responding to the transition from the state [1′] to the state [2], display discharge is generated in which the second display electrode is an anode.
(3) Both the wall voltage Vw(XY) and the wall voltage Vw(AY) become Vs by the electrostatic attraction of the display discharge and the space charge. In the state [3], Vc(XY) is equal to 0, and Vc(AY) is equal to zero. When the bias of the second display electrode is finished, the cell voltage Vc(XY) becomes the value of the wall voltage Vw(XY), and the cell voltage Vc(AY) becomes the value of the wall voltage Vw(AY). Therefore, in the state [3′] Vc(XY) is equal to Vs, and Vc(AY) is equal to Vs.
(4) When the first display electrode is biased again, drive voltage is added to wall voltage Vw(XY). In the state [4], Vc(XY) is equal to 2Vs, and Vc(AY) is equal to Vs. Responding to the transition from the state [3′] to the state [4], display discharge is generated again in which the first display electrode is an anode. After that, the transition from the state [4] to the state [1] is performed, and the above-mentioned state transition is repeated.
As explained above, the conventional driving method in which a sustain pulse having a simple rectangular waveform is applied includes the relationship between the cell voltage at the XY-interelectrode and the cell voltage at the AY-interelectrode at the instant when display discharge is generated like the state [2] and the state [4], i.e., Vc(XY) is equal to 2×Vc(AY). This relationship holds fixedly whichever value the pulse amplitude (Vs) is set to within a tolerance for optimizing the drive condition. Namely, in a cell voltage plane, the state [2] and the state [4] are always positioned on the line that passes through the origin (i.e., the intersection of two axes) and has the gradient ½. Such dependency of luminance and light emission efficiency on the drive voltage in the conventional driving method is shown in FIG. 15. The drive voltage is the sustain voltage (Vs) that is applied at the XY-interelectrode for display discharge, and the light emission efficiency is the light emission quantity [1 m] per unit consumption electric power [W]. As shown in FIG. 15, the conventional method has a problem that the light emission efficiency is reduced when trying to increase the luminance. Concerning solution for this problem, Japanese unexamined patent publication No. 10-333635 discloses a drive waveform for applying a voltage temporarily higher than a normal voltage at start of the display discharge to the display electrode pair and then applying the normal voltage. However, it is found that this waveform cannot improve the display operation characteristics remarkably.